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SpaceX

Sr. IC Layout Engineer (Silicon Engineering)

Job Posted 8 Days Ago Posted 8 Days Ago
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Redmond, WA
Senior level
Redmond, WA
Senior level
Lead IC layout design projects, collaborating with integrated circuit designers to optimize chip layouts while minimizing parasitic capacitance. Perform layout checks and integrate designs for manufacturing.
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SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

SR. IC LAYOUT ENGINEER (SILICON ENGINEERING)
At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to 5M+ users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe. 
We are seeking motivated, proactive, and intellectually curious engineers who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design, firmware, pre-silicon verification, post-silicon validation, product engineering, manufacturing/production, and more). In this role, you will be on a team working on multiple silicon projects that are driving more integration, lower power, mixed signal architectures and advanced silicon technology for deployment in space and ground infrastructures. You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and RFIC designs. 

RESPONSIBILITIES:

  • Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations
  • Accurately estimate the schedule for the layout work and identify areas of complexity that need early investigation
  • Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance in the layout
  • Perform design rule checking, electrical rule checking and layout versus schematic checks and resolve errors
  • Perform top-level layout integration with electrostatic discharge structures and pad assembly and perform final tape out (including density fill, running design for manufacturability checks and sharing GDS with the foundry)
  • Work with EDA suppliers to trial new tools and features
  • Generate guides and demos for others in the team to showcase improvements in layout technique

BASIC QUALIFICATIONS:

  • Bachelor’s degree in electrical or computer engineering
  • 5+ years of professional experience as an IC layout designer OR 8+ years of professional experience with integrated circuit layout design 

PREFERRED SKILLS AND EXPERIENCE:

  • Strong analog layout skills
  • Experience in advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below
  • Experience in layout of circuits with frequencies up to 50GHz
  • Experience in layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers
  • Experience with skill programming
  • Experience with shell scripting, Perl, Python or similar language
  • Experience managing revision control systems
  • Experience with circuit design
  • Understanding of layout considerations for device matching, coupling and noise isolation
  • Working knowledge of Linux
  • Excellent communication skills (both oral and written) are required
  • Able to work independently on challenging problems

ADDITIONAL REQUIREMENTS:

  • Must be willing to work extended hours and weekends as needed to meet critical milestones

COMPENSATION AND BENEFITS:    

Pay range:    
Silicon Engineer/Senior: $130,000.00 - $180,000.00/per year    
    
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.

ITAR REQUIREMENTS:

  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.  

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com

Top Skills

Eda Tools
Ic Layout Design
Linux
Python)
Scripting (Perl

SpaceX Redmond, Washington, USA Office

22630 NE Marketplace Dr, Redmond, Washington, United States, 98053

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